A Versatile Tuple-Based Optimization Framework

This thesis describes a versatile tuple-based optimization framework. This framework is capable of optimizing traditional imperative codes (such as sparse matrix computations) as well as declarative codes (such as database queries). In the first part of this thesis, the vertical integration of database applications is discussed. Using the described framework it is possible to represent the application codes as well as the declarative database queries within the same intermediate representation, unlocking many optimization opportunities. The second part of this thesis explores the optimization of irregular codes using this framework. It is shown that by expressing irregular codes within the presented framework, many different variants of this code using different data structures can be generated automatically.Computer Systems, Imagery and Medi

Real-time interactive visualization of large networks on a tiled display system

This paper introduces a methodology for visualizing large real-world (social) network data on a high-resolution tiled display system. Advances in network drawing algorithms enabled real-time visualization and interactive exploration of large real-world networks. However, visualization on a typical desktop monitor remains challenging due to the limited amount of screen space and ever increasing size of real-world datasets.To solve this problem, we propose an integrated approach that employs state-of-the-art network visual-ization algorithms on a tiled display system consisting of multiple screens. Key to our approach is to use the machine's graphics processing units (GPUs) to their fullest extent, in order to ensure an interactive setting with real-time visualization. To realize this, we extended a recent GPU-based implementation of a force-directed graph layout algorithm to multiple GPUs and combined this with a distributed rendering approach in which each graphics card in the tiled display system renders precisely the part of the network to be displayed on the monitors attached to it.Our evaluation of the approach on a 12-screen 25 megapixels tiled display system with three GPUs, demonstrates interactive performance at 60 frames per second for real-world networks with tens of thousands of nodes and edges. This constitutes a performance improvement of approximately 4 times over a single GPU implementation. All the software developed to implement our tiled visualization approach, including the multi-GPU network layout, rendering, display and interaction components, are made available as open-source software.Computer Systems, Imagery and Medi

Reducing Layered Database Applications to their Essence through Vertical Integration

Computer Systems, Imagery and Medi

Exploiting GPUs for Fast Force-Directed Visualization of Large-Scale Networks

Network analysis software relies on graph layout algorithms to enable users to visually explore network data. Nowadays, networks easily consist of millions of nodes and edges, resulting in hours of computation time to obtain a readable graph layout on a typical workstation. Although these machines usually do not have a very large number of CPU cores, they can easily be equipped with Graphics Processing Units (GPUs), opening up the possibility of exploiting hundreds or even thousands of cores to counter the aforementioned computational challenges. In this paper we introduce a novel GPU framework for visualizing large real-world network data. The main focus is on a GPU implementation of force-directed graph layout algorithms, which are known to create high quality network visualizations. The proposed framework is used to parallelize the well-known ForceAtlas2 algorithm, which is widely used in many popular network analysis packages and toolkits. The different procedures and data structures of the algorithm are adjusted to the CUDA GPU architecture's specifics in terms of memory coalescing, shared memory usage and thread workload balance. To evaluate its performance, the GPU implementation is tested using a diverse set of 38 different large-scale real-world networks. This allows for a thorough characterization of the parallelizable components of both force-directed layout algorithms in general as well as the proposed GPU framework as a whole. Experiments demonstrate how the approach can efficiently process very large real-world networks, showing overall speedup factors between 40x and 123x compared to existing CPU implementations. In practice, this means that a network with 4 million nodes and 120 million edges can be visualized in 14 minutes rather than 9 hours

Fast Post-Processing Pipeline for Optical Projection Tomography

To improve the effectiveness and efficiency of optical projection tomography (OPT) 3-D reconstruction, we present a fast post-processing pipeline, including cropping, background subtraction, center of rotation (COR) correction, and 3-D reconstruction. Regarding to the COR correction, a novel algorithm based on interest point detection of sinogram is proposed by considering the principle of OPT imaging. Instead of locating the COR on single sinogram, we select equally spaced sinograms in the detected full range of specimen to make the located COR more convincing. The presented post-processing pipeline is implemented in a parallel manner and the experiments show that the average runtime for each image of size 1036 × 1360 × 400 pixels is less than 1 min. To quantify and compare the reconstructed results of different COR correction approaches, the coefficient of variation instead of variance is employed. The results indicate that the proposed COR correction outperforms the three traditional COR alignment approaches in terms of effectiveness and computational complexity.Computer Systems, Imagery and Medi